By Crista Souza EBN (11/07/2000 10:21 AM EST)

Xilinx Inc. yesterday gave a glimpse into a possible future of system design with the unveiling of its Platform FPGA initiative.

Working on the principle of using a single, basic design for multiple applications, Xilinx aims to combine an advanced programmable-logic structure with embedded processors, real-time operating systems, DSP tools, and EDA software to create a platform that could be the cornerstone of any digital system.

"A Platform FPGA based on the Virtex-II architecture has the ability to embed hard cores together with software cores to provide the basic building block for what could be a system," said Wim Roelandts, president and chief executive of Xilinx, San Jose. "Only now, you don't need any other chips."

Initial Virtex-II devices are expected to debut as early as December. As the family rolls out over the next seven months, the Platform FPGA initiative will manifest in three basic forms: processing, DSP, and connectivity, according to Roelandts.

The processing platform, known as Empower, will draw on Xilinx's deal with IBM Corp. to embed the PowerPC processor and CoreConnect IP bus in Virtex-II devices. Initially Xilinx will embed the 300-MHz PowerPC 405, which delivers 420 Dhrystone mips, as well as offer soft processor cores, such as ARC, PIC, and OpenRISC.

While rival Altera Corp. has chosen to license two leading processor cores to embed in its high-end programmable devices, Roelandts said Xilinx currently has no plans to embed MPUs other than the PowerPC.

The DSP platform, dubbed Xtreme DSP, will center on performance enhancements to the Virtex-II architecture and high-level design software co-developed with The MathWorks Inc., Natick, Mass. Xilinx plans to embed multipliers and dual-port buffers to deliver 600 billion multiply-accumulate operations a second to tackle digital video, embedded computing, and broadband wireless applications. The fastest DSP today delivers 4.4 billion MACs a second, Roelandts said.

For the connectivity platform, called SystemIO Interfaces, Xilinx will apply its programmable I/Os to high-speed serial transceiver technologies licensed from AMCC, Conexant, and PMC-Sierra, and technology gleaned from its recent acquisition of RocketChips.

Two key elements of the initiative will be Xilinx's new IP-Immersion and Active Interconnect technologies. IP-Immersion "allows you to literally cut out a piece of programmable logic, anywhere within the fabric, and replace it with a hard core" to achieve better wire connections, Roelandts said. Active Interconnect uses repeaters throughout the routing structure to maintain predictable timing.

Xilinx aims to partner with EDA companies to develop system-level design tools to enable hardware/software co-design and co-verification.

Collaboration with Wind River Systems Inc. of Alameda, Calif., is expected to yield a convergence of products and technologies, including integration of FPGA debugging tools with Wind River's Tornado embedded development tools, and hardware/software co-design, among others.

Hardware/software co-design and co-verification is also being addressed in an expanded alliance with The MathWorks. By extending the Xilinx System Generator for Simulink and MATLAB from The MathWorks to support the embedded software portion of a DSP design, the companies said they will enable designers to partition DSP designs between an embedded processor and logic fabric in a single FPGA chip.

Mentor Graphics Corp. and Synopsys Inc. have agreed to lend EDA support in developing FPGA-based system-level design tools.